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Description: 基于FPGA的ARM IP核!该软核VHDL源码全部开放-FPGA-based ARM IP core! The soft core VHDL source code are all open
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Size: 690176 |
Author: 王钊 |
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Description: usb 2.0协议的ip核,可用,里面程序有文档说明-usb 2.0 protocol ip core, can be used, which procedures are documented
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Size: 208896 |
Author: KKK |
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Description: mc8051 IP Core源代码供学习和研究,严禁用于商业目的-mc8051 IP Core source code available for study and research for commercial purposes is strictly prohibited
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Size: 98304 |
Author: 林空 |
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Description: verilog source code for SD card SLAVE DEVICE IP-Core
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Size: 15360 |
Author: Antti Lukats |
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Description: altera cordic ip core, 包含文档,完整设计,以及测试向量-altera coedic ip core, including the document, whole design, and the testbench.
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Size: 896000 |
Author: panzhijian |
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Description: 基于wishbone总线的SD Card IP Core,有Verilog和VHDL两种语言版本,包含了FIFO和DMA两种实现方式,是开源的IP Core-Based on the wishbone bus SD Card IP Core, there are two language versions of Verilog and VHDL, including the FIFO and DMA implemented in two ways, is open source IP Core
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Size: 2271232 |
Author: 张亚群 |
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Description: 10/100 0M以太网MAC解决方案,是IP核的相关说明,利用ALTERA的FPGA设计,QUARTUS软件为开发平台。-10/100/1000M Ethernet MAC solution is the IP core instructions, using ALTERA' s FPGA design, QUARTUS software development platform.
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Size: 43008 |
Author: 天一生水 |
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Description: 友晶提供的Audio的IP核。这个IP核提供了Verilog的硬件部分源码和相应的HAL驱动程序。-Audio provided by Friends of Crystal' s IP core. The IP core provides a Verilog hardware part of the source and the corresponding HAL driver.
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Size: 125952 |
Author: changjiang |
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Description: NIOSII通过IP核读取CMOS图像传感器在SDRAM中的数据-NIOSII read through the IP core in CMOS image sensor data in SDRAM
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Size: 1024 |
Author: 尹长生 |
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Description: This simple VGA ip core sample.
This was implemented in Spartan3A-1800 Kit.-This is simple VGA ip core sample.
This was implemented in Spartan3A-1800 Kit.
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Size: 28672 |
Author: DalianCOB |
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Description: CPU86 - Free VHDL CPU8088 IP core
Copyright (C) 2005-2010 HT-LAB
Quick run:
1) Open a DOSBox/Cygwin shell
2) Navigate to the web_cpu88/Modelsim directory.
3) Execute run.bat
See website for more details.
The CPU86 core is released under the GNU GPL license. For more information read the copying.txt
file located in this directory.-CPU86 - Free VHDL CPU8088 IP core
Copyright (C) 2005-2010 HT-LAB
Quick run:
1) Open a DOSBox/Cygwin shell
2) Navigate to the web_cpu88/Modelsim directory.
3) Execute run.bat
See website for more details.
The CPU86 core is released under the GNU GPL license. For more information read the copying.txt
file located in this directory.
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Size: 562176 |
Author: Dhaval |
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Description: Xilinx IP核DPD的产品说明,全英文文档,下载前需注意;-product notes of Xilinx ip core DPD
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Size: 1247232 |
Author: philoman |
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Description: 基于SOPC的边界扫描测试控制器IP核设计SOPC-based boundary scan test controller IP core design-SOPC-based boundary scan test controller IP core design
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Size: 458752 |
Author: zaizai112 |
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Description: ethmac IP CORE VHDL IN QUARTUS-ethmac IP CORE VHDL IN QUARTUSII
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Size: 89088 |
Author: thegreeneyes |
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Description: SPI IP CORE Verilog quartus-SPI IP CORE Verilog quartusii
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Size: 1487872 |
Author: thegreeneyes |
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Description: uart IP CORE Verilog quartus-uart IP CORE Verilog quartusii
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Size: 36864 |
Author: thegreeneyes |
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Description: wishbone IP CORE Verilog quartus-wishbone IP CORE Verilog quartusii
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Size: 13312 |
Author: thegreeneyes |
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Description: 嵌入式ATA主机控制器IP核设计host controller -Embedded ATA host controller IP core design
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Size: 322560 |
Author: pin |
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Description: 告诉你如何编写一个IP核,对于FPGA 的学习很有帮助-Tell you how to write a IP core, FPGA' s very helpful for
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Size: 271360 |
Author: Zhang |
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Description: 利用FPGA内的IP核来实现FSK,Using FPGA to realize the IP core FSK。-Using FPGA to realize the IP core FSK,
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Size: 111616 |
Author: LI |
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